1. Field of the Invention
The present invention generally relates to superconducting latch driver circuits, and particularly relates to a superconducting latch driver circuit driven with a DC bias current.
2. Description of the Related Art
As a macroscopic quantum effect of a superconductor, a loop formed by the superconductor results in magnetic flux being quantized within the loop. The magnetic flux that is quantized in the superconductor is called an SFQ (single flux quantum). An SFQ circuit is a logic circuit that operates with magnetic flux quantum serving as information carriers. Logic “1” is represented by a state in which a flux quantum is present in a superconducting loop including two Josephson junctions, and logic “0” is represented by a state in which a flux quantum is absent.
A number of superconducting loops, each of which is the basic structure of the SFQ circuit, are connected together to form a ladder-type line comprised of superconductors and Josephson junctions. This is called a JTL (Josephson transmission line), and allows magnetic flux quantum to propagate. An SFQ generated in a given loop causes the switching of a next Josephson device, resulting in an SFQ being generated in the next loop. This chain reaction allows an SFQ to propagate. In this manner, various logic circuits such as flip flops or the like can be formed by use of the SFQ circuit.
In order to detect the output of a SFQ logic circuit, it is necessary to convert an SFQ pulse propagating through the SFQ circuit into a voltage pulse usable in a room temperature semiconductor logic circuit. This is achieved by a superconducting latch driver circuit.
FIG. 1 is a circuit diagram of a related-art superconducting latch driver circuit.
The superconducting latch driver circuit of FIG. 1 includes a Josephson junction 10, a resistor 11, a load inductor Lload, and a load resistor Rload. A resistor 21, a Josephson junction 22, and a resistor 23 together form one stage of the JTL, which is an example of the SFQ circuit. An inductor 15 and a Josephson junction 16 are devices for coupling the JTL and the superconducting latch driver circuit. The Josephson junction 10 has a hysteresis characteristic, and functions as a latch. An SFQ pulse having propagated through the JTL has an extremely short duration and a voltage of about 0.3 mV. In response to this short-duration pulse, the latch comprised of the Josephson junction 10 is set, thereby producing a voltage of about 2.8 mV as an output of the superconducting latch driver circuit.
[Non-patent Document 1] J. X. Przybysz and et. al., “Interface Circuits for Input and Output of Gigabit per Second Data,” International Superconductive Electronics Conference (ISEC'95)),8-3, p.304–306
[Non-patent Document 2] K. K. Likharev and V. K. Semenov, “RSFQ logic/Memory Family: A New Josephson-Junction Technology for Sub-Teraherts-Clock-Frequency Digital Systems, ” IEEE transaction on Applied Superconductivity, Vol. 1, No. 1, March, 1991, p.3–28
In the above-mentioned superconducting latch driver circuit, there is a need to reset the latch after the latching of data as preparation for next data. To this end, it is necessary to apply an AC bias current to the Josephson junction 10. This AC bias current, however, may generate the fluctuation of ground potential, which results in the operating margin of the SFQ circuit being reduced, or ends up being mixed into an input signal. It is thus desirable to use, for an output interface, a superconducting latch driver circuit that is drivable by a DC bias current.
As an interface circuit which operates with a DC bias current, circuits based on SQUID or SFQ/DC circuits are known to date. Because an output voltage of these circuits is as small as in the range of hundreds micro bolts, however, it is difficult to drive signal lines having large characteristic impedance directly at high speed.
Accordingly, there is a need for a superconducting latch driver circuit which can generate a sufficient output voltage and is driven by a DC bias current.